FAQ
- Digital
to Analog Converters (DAC)
Q: I would like to use the RDA012M4 die in our project, what are
its dimensions?
A: The
RDA012M4 die size is 182x199 mils or aprox 5000x4600 µm. Worthy
of note is the pad distribution; it has staggered pads in
a two row configuration.
Q: What interface
should I use when connecting the RDA012M4 (RDA012M4MS) to a FPGA?
A: Although the RDA012M4’s input buffers can accept signals
with 3.3V swing, at high clock frequencies (300MHz when operating
at 1.2GHz) a smaller swing is preferred. With 1.5V swing and
0.75V termination voltage, the HSTLI standard is a perfect
match for
the RDA012M4 data input signals.
Q:
How much current does the RDA012M4 use?
A: The
typical values will be:
ICC = 0.15A
@ 3.3V = 0.50W
IEEA = 0.10A @ -5.2V = 0.52W
IEED = 0.45A @ -5.2V = 2.34W
Q: What code
should I use to get a differential output of 0V?
A: With a
differential output, the 0V crossing lies between code 7FFh and
800h, which
means that it will be a difference
of 1/2 LSB from the DAC output and 0V.
With both single end outputs having a 600mV swing, 1/2 LSB will be 0.147mV.
Q:
Does the RDA012M4/MS need a heatsink?
A: The
RDA012M4 dissipates the heat through the metal pad at the bottom
of
the package, which is also electrically connected
to the device GND.
The
suggested way to dissipate the heat is to use the PCB’s ground
plane as a heatsink. The PCB should have a metal pad where the RDA012M4
body will sit. This pad
is connected to the ground plane through metal vias that also conduct
the heat.
If you feel
that a heatsink is needed, it should be mounted on the opposite
side of the PCB, directly bellow where the MUXDAC
will be
located. It
will attach
to a metal pad, soldered if possible, that will be connected to
the metal pad where the MUXDAC is seated through metal vias.
Since the
back of
the package
is used as ground connection, the heatsink will be grounded. Care
should be taken to avoid contact between the heatsink and other
circuitry that might be close
to it.
Via configuration
for MUXDAC ground connection / heat dissipation:
10 mil diameter
vias spaced 50 mils apart, evenly distributed in an array covering
the metal pad where the MUXDAC will be
mounted.
Those
vias should
connect the
metal pad to the PCB ground plane.
Q:
What is the minimum set-up and hold time between the data and
clock in
the RDA012?
A: The minimum
setup is 100ps and the hold time is 100ps
Q: What is
the minimum set-up and hold time between the data and
clock in the RDA012M4/MS?
A: The minimum setup at the RDA012M4 is 300ps
and the hold time is -50ps. One should consider the full path
from the RDA012M4
clock
out
to the
data input (PCB
trace delay for the clock, propagation delay from clock to
data generation, and PCB trace delay for the data) when computing
the
system timing
budget.
Q: Are there
ECL terminations (50 Ohm) on the data and clock inputs inside
the RDA012?
A: There
is no ECL termination on the data lines, so external termination
is required. The CLK and CLKB signals, however,
have internal 50
Ohm terminations to VTT.
Q:
I need to demetallize the RDA012M4/MS pins, what is the thickness
of
the plating?
A: The
plating is 50 microinches Au on 100-350 microinches Ni on KOVAR.
Q:
Will I see clipping in the single-ended output if
I increase VREF to say, -2.1V from the
nominal -2.0V?
A: No. If VREF = -2.1V, the single-ended output swing does increase
(from 600mV to 630mV) but the mid-point
of the swing
is automatically
shifted
down (from
-0.3V to -0.315V in this case), preventing any
clipping at 0V.
Q: How much
current can I expect to be drawn from the VREFA supply? Is this
just 2X the analog output
current
(i.e. 2X(12mA)
= 24mA)?
A: VREFA
pin is provided for added control over the full-scale of the
DAC. The internal reference
circuit
is designed
to provide -2.0V, which
can
change up
to +/- 0.5% as the supply voltage and /or operating
temperature changes. If the user prefers more
stable absolute full-scale,
one can use external
voltage reference
with low output impedance to override the internal
reference. The output resistance of the reference
node is 560 Ohm
+/- 10%. The
expected current,
as a result,
can be calculated from the equation IREF =
(VREF +2.0) / 560.
For example,
if the external reference voltage is set to -2.5V for larger
output swing, the
external reference
circuit
needs
to be able
to drive
-893 µA.
Please note that the DAC is optimized for best
performance using -2V reference. However, as
long as the reference
voltage is confined
to a -1 ~ -2.5V range,
the degradation in DAC performance is minor.
Q:
Does the clock duty cycle in the RDA012 have
to be 50%?
A: A 50% duty
cycle is recommended. It has not been tested otherwise, but the
chip should
operate
within
a within
+/- 10% margin.
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